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STM32F030F4P6
Différences
Ci-dessous, les différences entre deux révisions de la page.
| Prochaine révision | Révision précédente | ||
| documentation:microcontroleurs:stm32:stm32f030f4p6:index [2018/08/27 22:04] – créée f1sls | documentation:microcontroleurs:stm32:stm32f030f4p6:index [2018/08/27 22:48] (Version actuelle) – f1sls | ||
|---|---|---|---|
| Ligne 1: | Ligne 1: | ||
| ====== STM32F030F4P6 ====== | ====== STM32F030F4P6 ====== | ||
| - | ===== Datasheet | + | |
| - | {{ : | + | * [[https:// |
| + | * Core: ARM®32-bit Cortex®-M0 CPU, frequency up to 48 MHz | ||
| + | * Memories | ||
| + | * 16 to 256 Kbytes of Flash memory | ||
| + | * 4 to 32 Kbytes of SRAM with HW parity | ||
| + | * CRC calculation unit | ||
| + | * Reset and power management | ||
| + | * Digital & I/Os supply: VDD= 2.4 V to 3.6 V | ||
| + | * Analog supply: VDDA= VDDto 3.6 V | ||
| + | * Power-on/ | ||
| + | * Low power modes: Sleep, Stop, Standby | ||
| + | * Clock management | ||
| + | * 4 to 32 MHz crystal oscillator | ||
| + | * 32 kHz oscillator for RTC with calibration | ||
| + | * Internal 8 MHz RC with x6 PLL option | ||
| + | * Internal 40 kHz RC oscillator | ||
| + | * Up to 55 fast I/Os | ||
| + | * All mappable on external interrupt vectors | ||
| + | * Up to 55 I/Os with 5V tolerant capability | ||
| + | * 5-channel DMA controller | ||
| + | * One 12-bit, 1.0 μs ADC (up to 16 channels) | ||
| + | * Conversion range: 0 to 3.6 V | ||
| + | * Separate analog supply: 2.4 V to 3.6 V | ||
| + | * Calendar RTC with alarm and periodic wakeup from Stop/ | ||
| + | * 11 timers | ||
| + | * One 16-bit advanced-control timer for six-channel PWM output | ||
| + | * Up to seven 16-bit timers, with up to four IC/OC, OCN, usable for IR control decoding | ||
| + | * Independent and system watchdog timers | ||
| + | * SysTick timer | ||
| + | * Communication interfaces | ||
| + | * Up to two I2C interfaces | ||
| + | * Up to six USARTs supporting master synchronous SPI and modem control; one with auto baud rate detection | ||
| + | * Up to two SPIs (18 Mbit/s) with 4 to 16 programmable bit frames | ||
| + | * Serial wire debug (SWD) | ||
| + | * All packages ECOPACK®2 | ||
| + | |||
| + | ===== Documents | ||
| + | | ||
| + | * {{ : | ||
| + | |||
| + | |||
| + | ---- | ||
| + | |||
| + | {{: | ||
| + | {{: | ||
| + | {{: | ||
documentation/microcontroleurs/stm32/stm32f030f4p6/index.1535400243.txt.gz · Dernière modification : de f1sls
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